Character sequence detector



March 28, 1961 F. DAVID ETAL CHARACTER SEQUENCE DETECTOR Filed June 4, 1959 mmJDa .ruim

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FREDDY DAVID w|| |AM v. TYRLTCK BY STEPHEN E. TowNsEND ATTORNEY womDOm United States Patent O CHARACTER SEQUENCE DETEcToR Freddy David, William V. Tyrlick, and Stephen E. Townsend, Rochester, N.Y., assignors 'to General Dynamics Corporation, Rochester, N.Y., a corporation of Delaware Filed June 4, 1959, Ser. No. 818,137

4 Claims. (Cl. 307-88) The present invention relates to character sequence detectors and, more specifically, to a character sequence detector employing only solid-state components.

In applications which utilize binary signal representations of characters expressed in binary form, it is frequently necessary to condition the equipment in preparation for the occurrence of a future event which is generally announced in the form of a preselected sequence of two or more characters. In these applications, therefore, it is important that a device be employed which is responsive to this preselected sequence of characters and no other and also be insensitive to any deviations in the preselected sequence.

It is, accordingly, an object of this invention to provide an improved character sequence detector.

It is another object of this invention to provide an improved character sequence detector employing only solid-state components.

In accordance with this invention, a plurality of binary elements, each of the type having a first and a second stable state, either of which may be selected to indicate the presence of and the other the Vabsence of a character in the sequence, and characterized by the production of an output signal with each reversal of stable states is arranged in a plurality of groups of a different number of elements per group wherein each group corresponds to a respective character of the predetermined sequence and the number of elements per group is arranged to provide one element for each character of a sequence in the group corresponding to the initial character with the number of elements in each of the other groups corresponding to respective succeeding characters being one less than the elements contained in the preceding group. Adjacent elements of each group are interconnected with each other in such a manner that the stable state of each may be transferred to the next succeeding one in the same group in response to each simultaneous application of a shift pulse to all of the elements with each character whereby upon the occurrence of the predetermined sequence of characters the final element of each group is in the stable state selected to indicate the presence of a character of the sequence. Under these conditions, an output signal may be produced in response to the shift pulses, thereby indicating the occurrence of the predetermined sequence of characters.

For a better understanding of the present invention, together with further objects, advantages and features thereof, reference is made to the following description and accompanying drawings in which:

Figure l illustrates a preferred embodimentof the present invention; and

Figure 2 is a table useful in understanding the operation of the sequence detector of this invention.

To facilitate the description of the operation of the character sequence detector of this invention, and without intention or inference of a limitation thereto, a specific example of an application of a device of this type is in theteletypewriter switching art. In applications of this FAPice I type, a start of message character sequence is generally represented by ZCZC. Therefore, this invention will be described on the basis of detecting a ZCZC character sequence.

A source of binary signal representations of characters expressed in binary form may be of any of the conventional types, for example, a tape reader or one of the several buffer storage schemes, and, therefore, has herein been indicated in'block form by reference numeral 1 of Figure l. Assuming that the device of this invention is to be used with a five-bit-per-group binary code representation, binary signal source 1 is indicated as being equipped with live output circuits, one for each information bit of the binary code representations.

To provide with every character a respective output signal for each character of the predetermined sequence except that upon the occurrence of any character of the sequence there is no respective output signal provided therefor, a combination of conventional delay multivibrator circuits, decoder devices and gate circuits may be employed. Delay multivibrators are conventional in design and normally operate in a stable condition of operation, hereinafter referred to as the stable state, but may be triggered to the alternate condition of operation, hereinafter referred to as the alternate state, through the -application of an input signal thereto. After being triggered to the alternate state, upon the expiration of a selected time duration designed into the circuit, multivibrators of this type spontaneously return to the stable state. As the details of delay multivibrators form no part of this invention, they have herein been indicated in Figure l in block form by reference numerals 2, 7 and 8. Associated with binary signal source 1 is a readout pulse source which is arranged to produce an output signal with each character emanating from the binary signal source. As details of readout pulse sources are well known in the art and form no part of this invention, it is herein indicated in block form in Figure l by reference number 3. The signal produced by readout pulse source 3 is applied to an input terminal of delay multivibrator 2 and provides the trigger signal which is effective to reverse the state of delay multivibrator 2 from the stable t`o the alternate state. In the alternate state, delay multivibrator 2 produces an output signal upon output terminal 4 which is utilized in a manner to be later described. At the conclusion of the time interval designed into ,the circuitry, delay multivibrator 2 reverts to the stable state, thereby removing the signal from output terminal 4.

Also included in this arrangement is a binary information decoder device for each different character of the sequence. Each of these binary decoder devices is arranged to produce an output signal upon the receipt of the character to which it is responsive. Since there are two different characters in the sequence which has been assumed to be detected by the novel device of this invention, a binary information decoder device which is responsive to the character Z and a binary information decoder device which is responsive to the character C is employed. The binary information decoder devices which may be employed for this purpose may be of the type disclosed in a copending application, Serial No. 732,645, filed May 2, 1958, in the name of William V. Tyrlick, which is assigned to the same assignee as the present application, and are illustrated in block form in Figure 1 by reference numerals 5 and 6. These devices are shown connected in parallel to the output circuits of binary signal source 1. Assuming that decoder device 5 is responsive to the receipt of the character Z and that decoder device 6 is responsive to the receipt of the character C, decoder 5 will product -an output signal -upon the receipt of every character Z while decorder device 6 will produce an output signal upon the receipt of every character C Associated with each decoder device 5 and 6 is a conventional delay multivibrator circuit, illustrated in block form in Figure 1 by reference numerals 7 and 8, respectively. The output signals produced by the decoder devices 5 -and 6 serve as trigger signals to the input terminals of respective delay multivibrators 7 and S thereby triggering them to the alternate state, during which time an output signal appears upon respective output terminals 9 and 10 thereof. As delay multivibrators 7 or 8 revert to the stable state, the output signals are removed from respective output terminals 9 or 10.

The signal produced by delay multivibrator 2, While operating` in the alternate state as produced with each character emanating from binary signal source 1, is applied through output terminal 4 to respective input terminals of two input AND gates 11 and 12. The output terminal 9 of delay multivibrator 7 is connected to the other input terminal of two input AND gate 11, while output terminal of delay multivibrator 8 is connected to the other input terminal of two input AND gate 12. With the AND gate arrangement as herein indicated yand assuming that the signal upon output terminal 4 be negative-going during the period that delay multivibrator 2 is in the alternate state, the signal upon respective output terminals 9 and 10 of delay multivibrators 7 and 8 must be at positive potential during the period that delay multivibrators 7 and 8 are in the alternate state, as produced by the signals from decoder devices 5 or 6 upon the receipt of a respective ZA or C character, and at a ground potential during the period delay multivibrators 7 and 8 Iare in the stable state, to provide proper biasing potentials for these gates. Under these conditions, in the absence of a Z character or a C character, the signal of output terminals 9 and 10 of respective delay multivibrators 7 yand 8 are at a ground potential, thereby forward biasing diodes 13 and 14 of respective AND gates 11 and 12. The negativegoing signal present upon output terminal 4 of delay multivibrator 2 with each character emanating from binary signal source 1 is conducted through diodes 13 and 14. of respective AND gates 11 and 12 and appear as respective output signals for each character of the sequence at terminals 15 and 16. However, upon the receipt of a character Z or a character C, the signal of output terminals 9 or 10 of respective delay multivibrators 7 or 8 will be at positive potential. The presence of a positive potential upon output terminal 9, with the receipt of a character 2, places a positive potential upon diode 13 of AND gate 11, thereby preventing the passage therethrough of the negative-going signal appearing upon output terminal 4 of delay multivibrator 2; while the presence of a positive potential signal upon output terminal 10 of delay multivibrator 8, with the receipt of a character C, places a positive potential upon diode 14 of AND gate 12, thereby preventing the passage therethrough of the negative-going signal appearin upon output terminal 4 of delay multivibrator 2. In this manner, a respective output signal is produced for each character of the predetermined sequence except that upon the occurence of any character of the sequence there is no respective output signal provided therefor.

A plurality of binary elements, each of the type having two stable states, generally termed the 1 and O states, either of which may be selected to indicate the presence of and the other the absence of a character of the sequence, and characterized by the production of an output signal with each reversal of` stable states is provided and are indicated `as magnetic cores, but not necessarily limited thereto, by reference numerals 17 through 23, inclusive.

These binaryv elements are arranged in a plurality of groups of a different number of elements per group where each group corresponds to a respective character of the predeterminedv sequencey and the number ofelements character of the sequence in the group corresponding to the initial character with the number of elements in each of the other groups corresponding to respective succeeding characters being one less than the elements contained in the preceding group. That is, elements 17, 19, 21 and 23 comprise a four element group corresponding to the initial character Z of the predetermined sequence of four characters; elements 18, 20 and 22 comprise the next group corresponding to the next character C ot' the predetermined sequence and contains three elements; elements 17 and 19 comprise the next group corresponding to the third character Z of the predetermined sequence and contains two elements, and element 18 comprises the group of one element corresponding to the nal character C of the predetermined sequence. It is pointed out, at this time, that with repeating characters in the predetermined sequence, a reduction in the total number of elements required may be effected through thek combining of the groups as hereinbefore described. In the event the sequence should contain all diterent characters, the groups may not be thus combined. For example, with a four character sequence of different characters, four separate groups of four, three, two and one element per group, respectively, would be required.

To provide a shift pulse with each character emanating from binary signalsource 1, a conventional delay multi-V vibrator which operates in the same manner as that described in regard to multivibrator 2 may be used and is herein indicated in block form by reference numeral 24. Multivibrator 24 is arranged to produce a negative` potential signal upon output terminal 25 while in the stable state and a ground potential signal upon o utput terminal 25 while in the alternate state. Output terminals 15 and 16, corresponding to respective characters Z and C, of respective gates 11 and 12 are connected to the input terminal of delay multivibrator 24 through a conventional OR gate, the details of which are well known in the art and form no part of this invention, illustrated in block form by reference numeral 26. Since there will be an output signal present upon either output terminal 15 or output terminal 16 with every character emanating from binary signal source 1, the alternate state of delay multivibrator 24 will be produced with each character with the resulting ground potential signal upon output terminal 25. This shift pulse is connected to all of the elements of the groups through a shift pulse coupling circuit comprising lead 27, coupling coils 28, 29, 30, 31, 32, 33 and 34, as indicated, and source of negative potential 35. The polarity sense of each of coupling windings 28 through 34, inclusive, is such as to produce Within the elements to which they are coupled the stable state which has been selected to indicate the presence of a character of the sequence. For purposes of clearly explaining the operation of the device of this invention, this stable state will be assumed to be the 0 state and as such will hereinafter be referred to while the 1 state will indicate the absence of a character of the sequence.

The respective output signals which are produced by delay multivibrator 2 with each character emanating from binary signal source 1, except upon the receipt of a character of the sequence, and which appear at terminals 15 and 16 must be applied to the initial element of the group which corresponds to the same character of the sequence. That is, the respective output signals which appear at output terminal 15 for the Z .characters are applied to the initial element of each the first and third groups, or element 17, through coupling winding 36; while the respective output signals which appear at output terminal 16 for the C characters are applied to the initial element of each the second and fourth groups,

or element 18, through coupling winding 37. The polar-V ity sense of each of coupling windings 36 and 37 is such that when either is energized by the respective output signals, the stable state selected to indicate the absence ofL acharacter of the sequence, in this instance the 1" stable state, is produced in the element to which it is coupled. Upon the receipt of a character of the sequence, therefore, there is no change in stable state of the initial element of the group corresponding to that character. since there is no output signal present, and the initial elements of the corresponding group remain in the 0 state as produced by the previous shift pulse, thereby lndicatlng the presence of a character of the sequence.

A dJacent ones of the elements in each of the groups are interconnected in such a manner that the stable state of each may be transferred to the next succeeding one 1n* the same group in response to each simultaneous application of a shift pulse from delay multivibrator 24 through shift pulse coupling windings 28 through 34, mclusive. This transfer circuitry has been indicated in detail between elements 17 and 19 and elements 18 and 20. As this coupling circuitry is identical in every respect between each of the other adjacent elements it has been indicated as arrows between elements 19, 21; 21, 23; and 20, 22; in the interest of reducing drawing cornplexity. With these connections, therefore, the respective groups of elements function as a conventional shift register circuit in which the stable condition of each stage may be transferred to the next stage in response to the application of shift pulses.

With this arrangement, only upon the occurrence of the predetermined sequence of characters, the final element of each of the groups will be in the 0 stable state which has been selected to indicate the presence of a character of the sequence. As messages are received and are monitored by the device of this invention, certain ones of the several binary elements comprising the several groups will be in the l stable state, indicating that during the course of the message the characters of the sequence were not received. Assume that at the conclusion of any shift pulse, cores 17, 19, 23, 18 and 22 are in the "0 stable state while cores 21 and 20 are in the "1 stable state as is indicated in the table of Figure 3. Upon the receipt of the first character Z of the sequence, there will be no respective output signal present upon output terminal 15, for reasons as previously described, and core 17 will, of course, remain in the 0 stable state, thereby indicating the presence of a character Z of the sequence. Since there was a Z character present, there will be a respective output signal present for the character C upon output terminal 16 which will be applied through amplifier 39 to coupling winding 37 in a polarity sense for producing in core 18 the "1 stable state, indicating the absence of the character C of the sequence. The following shift pulse will advance the stable state of the several elements to the next succeeding one as is indicated in the table of Figure 2. As the next character' C is received, there will be no respective output signal present upon output terminal 16; therefore, core 18 will remain in the "0 state. As the character C was present, there was no character Z present; therefore, a respective output signal will be present upon output terminal 15 which will be applied through amplifier 38 to coupling winding 36 in a polarity sense for producing in core 17 the l stable state, indicating the absence of a character Z of the sequence. The following shift pulse, of course, will advance the stable state of the several cores to the next succeeding core of the same group yas illustrated in the table of Figure 3. As the third character Z of the sequence is received, element 17 will, of course, remain in the 0 stable state while core 18 will ybe triggered to the l stable state for reasons as have previously `been described. The next shift pulse `again advances the stable state of each core to the next succeeding core of the same group as illustrated. The

receipt of the final character C of the sequence will result' in core 17 being in the l stable state and core 18 inthe ."0 stable state which will result in cores 17, 21V and 20 being in thefl stable state while the final core of each of the groups, 23, 22, 19 and 18, are inthe "0 stable state. Therefore, upon vthe occurrence of a shift pulse with the next character emanating from binary signal source 1, none of the final elements of the respective groups will have its stable state reversed in that all will be in the 0 stable state which is produced by the shift pulses.

So that an output signal may be produced at this time, there is required to be provided the necessary circuitry which is responsive to the shift pulses and which will produce an output signal only when the final element of each of the groups is in the O stable state, selected to indicate the presence of a character of the sequence, thereby indicating the occurrence of the predetermined sequence of characters.

One method of providing this circuitry is through the use of an individual binary element, indicated in Figure l as a magnetic core, but not necessariiy limited thereto, by reference numeral 40. The shift pulses emanating from shift pulse source 24 is applied to magnetic core 40 through lead 27 and coupling winding 41. The polarity sense of coupling winding 41 is unimportant and may be of a polarity sense to produce either stable state in magnetic core 40.

Coupled to the nal element of each of the respective groups, that is, element 23 of group l, element 22 of group 2, element 19 of group 3, and element 18 of group 4, is an output coupling winding indicated by reference numerals 42, 43, 44 and 45, respectively. In each of these output coupling windings there will appear an output signal pulse, produced upon each reversal of stable state of that element in response to the application of the shift pulses when any combination of these elements is in the stable state selected to indicate the absence of a character of the sequence. Conversely, the absence of an output signal pulse in any of these output coupling windings denotes that the element to which it is coupled is in the stable state selected to indicate the presence of a character of the sequence.

To produce an inhibiting signal which will prevent the reversal of stable state of core 40 in response to the application thereto of a shift pulse in the presence of any combination of output signals from the respective output coupling windings 42 through 45, inclusive, the necessary responsive circuitry is provided. This circuitry may again be a conventional delay multivibrator which operates in the same manner as delay multivibrator 2 and, since the details form no part of this invention and are Well known in the art, is indicated in block form by reference numeral 46. This delay multivibrator is arranged in such a manner that in the stable state a negative potential appears upon its output terminal 47, while in the alternate state, as produced in response to any combination of output signals from the respective output couplingwindings 42 through 45, inclusive, a ground potential appears upon output terminal 47. With this arrangement, therefore, as delay multivibrator 46 is triggered to its alternate stable condition of operation in response to the application to its input terminal of any combination of output signals from output coupling windings 42 through 45, inclusive, thereby denoting that at least one of the final elements of the respective groups is in the stable state selected to indicate the absence of a character of the sequence, the potential at output terminal 47 goes to ground thereby'completing a circuit from a source of negative potential 35, as indicated. This circuit is coupled to core 40 through coupling winding 48, the polarity sense of which is such as to produce the stable state in magnetic member 40 opposite that produced by a shift pulse energizing coupling coil 41. Therefore, in the presence of an inhibiting signal from inhibiting pulse source multivibrator 46, the shift pulses emanating from shift pulse source 24 is inefective to reverse the stable state of core 40. However, should the nal element of each of the groups be in the stable state selected to indicate the presence of a characterof the sequence, there would be no output signal pulse present in any of the output coupling windings 42 through 45, hence, no inhibiting signal from inhibiting signal source 46. This permits the reversal of stable state of core 40 by a shift pulse emanating from shift pulse 24 and energizing shift coupling winding 41 thereof. As the stable state of magnetic core 40 is reversed, a signal pulse is produced in output coupling winding 49 thereof and may be applied to external utilization circuitry which, since the details form no part of this invention, is illustrated in block form by reference numeral S0.

With the next inhibiting signal produced by inhibiting signal source 46, magnetic core 40 is, of course, again reset to the stable state opposite that produced by the shift pulses energizing shift coupling winding 41 thereof, thereby conditioning the novel device of this invention for the detection of the next occurrence of the predetermined sequence of characters.

Referring again to the table of Figure 2, there will be no reversal of stable state of core 40 with the first shift pulse because magnetic member 18 was in the l stable state, thereby producing a signal in output coupling winding 45 thereof, which triggers inhibiting signal source 46. Upon the occurrence of the second shift pulse, magnetic member 18 is again reversed from the 1 stable state to the stable state, thereby producing an output coupling winding 45 thereof, which triggers inhibiting signal source 46. Upon the occurrence of the third shift pulse, magnetic cores 23 and 22 are both reversed from the l stable state to the 0 stable state, thereby producing signals in the respective output coupling windings 42 and 43 thereof, the combination of signals which triggers inhibiting signal source 46. Upon the occurrence of the fourth shift pulse, cores 19, 18 and 22 are reversed from the l stable state to the 0 stable state, thereby producing a combination of output signals in respective output coupling windings 44, 45 and 43 thereof, which triggers inhibiting signal source 46. With the fifth shift pulse, however, since each of magnetic cores 19, 23, 18 and 22 are in the 0 condition of operation, there is no reversal of stable state of any of these cores; hence, no combination of output signals is present to trigger inhibiting signal source 46, in the absence of which the shift pulses may reverse the condition of operation of core 40, as previously described.

While certain specific circuitry and elements have been indicated in the description of this invention, the several pulse sources and binary elements is not necessarily restricted to delay multivibrators and magnetic members in that any pulse source may be used and any binary element possessing two stable states may be used in the several groups. Y

While a preferred embodiment of the present invention has been shown and described, it will be obvious to those skilled in the art that various modifications and substitutions may be made without departing from the spirit of the invention which is to be limited only within the scope of the appended claims.

What is claimed is: v

1. A character sequence detector for use with a source of binary signal representations of characters expressed in binary form of the type which produces an output signal upon the occurrence of a predetermined sequence of characters comprising in combination with a source of binary signal representations which is arranged to provide with every character a respective output signal for each character of the predetermined sequence except that upon the occurrence of any character of the sequence there is no respective output signal provided therefor; a plurality of binary elements, each of the type having a first and a second stable state, either of which may be selected to indicate the presence of and the other the absence of a character of the sequence, and characterized by the produc-4 tion of an output signal with each reversal of stable states, arranged in a plurality of groups of a different number of elements per group where each group corresponds to a repective character of the predetermined sequence and the number ofV elements per group is arranged to provide one element for each character of the sequence in the group corresponding to the initial character with the number of elements in each of the other groups corresponding to respective succeeding characters being one less than the elements contained in the group corresponding to the preceding character; an individual binary element of the type having a first and a second stable st ate and characterized by the production of an output signal with each reversal of stable states; first circuit means responsive to any combination of the respective output signals for producing a shift pulse with each character; shift pulse coupling circuit means for applying said shift pulses simultaneously to all of said elements in a polarity sense for producing in those elements included in the plurality of groups the stable state selected to indicate the presence of a character of the sequence and either stable condition of operation in the said individual binary element; coupling circuit means for applying each said respective output signal to the initial element of the group which corresponds to the same character of the sequence in a polarity sense for producing therein the stable state which indicates the absence of a character of the sequence whereby upon the receipt of a character of the sequence there is no change in stable state of the initial element of the group corresponding to that character, means for interconnecting adjacent ones of said elements in each of said groups in such a manner that the stable state of each may be transferred to the next succeeding one in the same group in response to each simultaneous application of said shift pulses lto all of said elements wherebyupon. the occurrence of the predetermined sequence of characvters the final element of each of said groups is in the stable v circuit means responsive to any combination of said output signal pulses Vfor producing an inhibiting signal; means for coupling said inhibiting signal to said individual binary element in a polarity sense opposite that of said shift pulses whereby the shift pulses will be ineffective to reverse the stable state of the individual binary element in the presence of an inhibiting signal from said second circuit means indicating the absence of any one or all of the characters of the sequence, and output circuit means coupled to said individual binary element in which an output signal appears with each reversal of stable state of that element in response to said shift pulses indicating the occurrence of a predetermined sequence of characters.k

2. A character sequence detector for use with a source of binary signal representations of characters expressed in binary form of the type which produces an output signal upon the occurrence of a predetermined sequence of characters comprising in combination with a source of binary signal representations which is arranged to provide with every character a respective output signal for each character of the predetermined sequence except that upon the occurrence of any character of the sequence there is no respective output signal provided therefor; a plurality of magnetic cores, each of the type having a first and a second stable state, either of whichrnay be selected to indicate the presence of and the other the absence of a character of the sequence, `and characterized by the production of an output signal'with each reversal of stable states,'arranged in a plurality of groupsA ofa different number of cores per group where each group corresponds,

to a respective character of the predetermined sequence and the number of cores per group is arranged to provide one core for each character of the sequence in the group corresponding to the initial character with the number of cores in each of the other groups corresponding 'to respective succeeding characters being one less than the cores contained in the group corresponding to the preceding character; an individual binary element of the type having a first and a second stable state and characterized by the production of an output signal with each reversal of stable states; first circuit means responsive to any combination of the respective output signals for producing a shift pulse with each character; a shift pulse coupling circuit means for .applying said shift pulses simultaneously to all of said cores and said individual binary element in a polarity sense for producing in the magnetic cores the stable state selected to indicate the presence of a character of the sequence and either stable state in the said individual binary element; coupling circuit means for applying each said respective output signal to the initial core of the group which corresponds to the same character of the sequence in a polarity sense for producing therein the stable state which indicates the absence of a character of the sequence whereby upon the receipt of a character of the sequence there is no change in stable state of the initial core of the group corresponding to that character, means for interconnecting adjacent ones of said cores in each of said groups in Such a manner that the stable state of each may be transferred to the next succeeding one in the same group in response to each simultaneous application of said shift pulses to all of said cores whereby upon the occurrence of the predetermined sequence of characters the final core of each of said groups is in the stable state selected to indicate the presence of a character of the sequence; output circuit means coupled to the final core of each of said groups in each of which the presence of an output signal pulse denotes the core to which it is coupled is in the stable state selected to indicate the absence of a character of the sequence and the absence of an output signal pulse denotes the core to which it is coupled is in the stable state selected to indicate the presence of a character of the sequence; second circuit means responsive to any combination of said output signal pulses for producing an inhibiting signal; means for coupling said inhibiting signal to said individual binary element in a polarity sense opposite that of said shift pulses whereby the shift pulses will be ineffective to reverse the stable state of the individual binary element in the presence of an inhibiting signal from said second circuit means indicating the absence of any one or all of the characters of the sequence, and output circuit means coupled to said individual binary element in which an output signal appears with each reversal of stable state of that element in response to said shift pulses indicating the occurrence of aV predetermined sequence of characters.

3. A character sequence detector for use with a source of binary signal representations of characters expressed in binary form of the type which produces an output signal upon the occurrence of a predetermined sequence of characters comprising in combination with a source of binary signal representations which is arranged to provide with every character a respective output signal for each character of the predetermined sequence except that upon the occurrence of any character of the sequence there is no respective output signal provided therefor; a plurality of magnetic cores, each of the type having a first and a second stable state, either of which may be selected to indicate the presence of and the other the absence of a character of the sequence, and characterized by the production of an output signal with each reversal of stable states, arranged in a plurality of groups of a different number of cores per group where each group corresponds to a respective character of the predetermined sequence and the number of cores per group is arranged to provide one core for each character of the sequence in the group corresponding to the initial character with the number of cores in each of the other groups corresponding to respective succeeding characters being one less than the cores contained in the group corresponding to the preceding character; an individual magnetic core of the type having a first and a second stable state and characterized by the production of an output signal with each reversal of stable states; first circuit means responsive to any combination of the respective output signals for producing a shift pulse with each character; shift pulse coupling circuit means for applying said shift pulses simultaneously to all of said cores in a polarity sense for producing in those cores included in the plurality of groups the stable state selected to indicate the presence of a character of the sequence and either stable state in the said individual magnetic core; coupling circuit means for applying each said respective output signal to the initial core of the group which corresponds to the same character of the sequence in a polarity sense for producing therein the stable state which indicates the absence of a character of the sequence whereby upon the receipt of a character of the sequence there is no change in stable state of the initial core of the group corresponding to that character, means for interconnecting adjacent ones of said cores in each of said groups in such a manner that the stable state of each may be transferred to the next succeeding one in the same group in response to each simultaneous application of said shift pulses to all of said cores whereby upon the occurrence of the predetermined sequence of characters the final core of each of said groups is in the stable state selected to indicate the presence of a character of the sequence; output circuit means coupled to the final core of each of said groups in each of which the presence of an output signal pulse denotes the core to which it is coupled is in the stable state selected to indicate the absence of a character of the sequence and the absence of an output signal pulse denotes the core to which it is coupled is in the stable state selected to indicate the presence of a character of the sequence; second circuit means responsive to any combination of said output signal pulses for producing an inhibiting signal; means for coupling said inhibiting signal to said indivdiual magnetic core in a polarity sense opposite that of said shift pulses whereby the shift pulses will be ineffective to reverse the stable state of the individual magnetic core in the presence of an inhibiting signal from said second circuit means indicating the absence of any one or all of the characters of the sequence, and output circuit means coupled to said individual magnetic core in which an output signal appears with each reversal of stable state of that core in response to said shift pulses indicating the occurrence of a predetermined sequence of characters.

4. In combination with a Adevice for successively producing any of a predetermined plurality of different character-manifesting coded signals'in any sequence, a character sequence detector coupled to said device for providing an output only in response to a given number of successive coded signals being composed of certain particular ones of said coded signals occurring in a predetermined sequence, said detector comprising an individual decoder means corresponding to each different coded signal included among said particular ones of said coded signals for producing an output therefrom only in response to any of said plurality of coded signals except the coded signal to which it corresponds being applied thereto, means coupling said decoder means to said device for applying said plurality of coded signals as an input to each of said decoder means, an individual shift register associated with each individual decoder means, each shift register being composed of a number of interconnected bistable elements equal to the difference between one plus said given number and the ordinal position of the first occurrence of each different coded signal 1 l included among said particular ones of said coded signals in -said predetermined sequence, means coupling each decoder means to its associated shift register for switching the first bistable element thereof from a first to a second vstable condition thereof only in response to an output from the associated decoder means, shift pulse means coupled to said device for producing a shift pulse immediately following every coded signal, means coupled to said shift pulse means for applying said shift pulse to all said bistable elements of all said shift registers and in response thereto shifting the condition of each bistable element having said second stable condition in each shift register to the next succeeding bistable element therein, whereby all of certain particular bistable elements will simultaneously have said rst stable condition only in response to the occurrence of said predetermined sequence of said certain particular -ones of said coded signals, and coincidence means coupled to each of said certain'particular bistable elements for monitoring the stable condition thereof and producing an output therefrom only if all of said certain particular bistable elements simultaneously have said rst stable condition.

Winick July 22, 1958 Ross Apr. 28, 1959 

